STM32 Programming. Part 7: MCO Output
Posted: 16 Oct 2023, 03:10
Here is part of a block diagram showing the MCO:
The clock signal to the MCO pin can be supplied from SYSCLK, the HSE and HSI oscillators, and the PLL signal divided in half. In stm32f103c8, the MCO pin is connected to the PA8 port and must be set to alternate function mode before the pin can be used in this mode. The signal source is selected using the MCO bits in the RCC_CFGR register:
MCO - supplying a clock signal to the MCO pin of the microcontroller.
- 0xx: The function is disabled
- 100: System clock (SYSCLK) selected
- 101: HSI signal selected
- 110: HSE signal selected
- 111: Selected signal from PLL, which is divided by 2.
Code: Select all
//Setting the clock signal output
//through MCO pin
//sourse - clocking source
// 0 - disabled
// 4 - SYSCLK
// 5 - HSI
// 6 - HSE
// 7 - PLL/2
void MCO_Init(int sourse)
{
if(sourse != 0 && !(sourse >= 4 && sourse <= 7))
return;
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //Enable PA port clocking
//Set the port in the alternative function mode
GPIOA->CRH &= ~(GPIO_CRH_MODE8_Msk | GPIO_CRH_CNF8_Msk); //Reset bits to zero
GPIOA->CRH |= (0x03 << GPIO_CRH_MODE8_Pos) | (0x02 << GPIO_CRH_CNF8_Pos); //set desired bits
RCC->CFGR &= ~(RCC_CFGR_MCO_Msk); //Set everything to zero first
RCC->CFGR |= (sourse<<RCC_CFGR_MCO_Pos); //Set clocking source
}
Check:
Code: Select all
void main()
{
ClockInit();
// 0 - disabled
// 4 - SYSCLK
// 5 - HSI
// 6 - HSE
// 7 - PLL/2
MCO_Init(6);
for(;;)
{
}
}
The oscilloscope shows a frequency of 8 MHz. Next, from the HSI oscillator (MCO_Init(5)):
Here we should have 8 MHz, but the actual value is 8.065. And this value floats noticeably when the temperature of the microcontroller changes. Let's go further: PLL/2:
This should be a meander with a frequency of 36 MHz, in fact we see a broken sine with this frequency. My oscilloscope does not pull such frequencies, because its bandwidth is 50 MHz. And lastly, we connect the MCO to SYSCLK, which has a frequency of 72 MHz:
Unfortunately, it is difficult to judge the shape of the signal on PA8, because the frequency of the measured signal exceeds the oscilloscope bandwidth. We should play with the port settings sometime and see how much the MODE bits in the GPIOx_CRy register affect the port output signal shape.